1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, and more specifically to a process for forming a multilayer wiring conductor structure in the semiconductor device.
2. Description of Related Art
In general, aluminum has frequently been used as a wiring conductor for a semiconductor device, since the aluminum is excellent in processibility, in adhesive property to an insulator film, and in economy. However, with a multilayered and microminiaturized wiring conductor structure which has contributed to a recent increase of an integration density, various problems such as electromigration, stress-migration and corrosiveness trend to occur. As a countermeasure for these problems, attention has been paid to a multilayered wiring conductor structure of a noble metal formed by using a plating.
Referring to FIGS. 1A to 1H, there are shown sectional views illustrating one process known to the inventor for manufacturing a semiconductor device.
As shown in FIG. 1A, a power supply film 3 is formed on an insulator film 2 formed on a silicon substrate 1 by depositing a titanium tungsten film 3A and a gold film 3B in the named order.
Then, as shown in FIG. 1B, a photoresist film 4 is coated on the power-supply film 3, and is patterned so as to form a first mask for a lower layer wiring conductor formation.
As shown in FIG. 1C, an electroplating is performed using the photoresist film 4 as a mask, so that a gold film is deposited on the exposed power supply film 3 so as to form a lower layer wiring conductor 5.
Thereafter, the photoresist film 4 is removed, and then, as shown in FIG. 1D, a photoresist film 17 is coated and patterned to form a through hole for formation of a connection pillar between the lower layer wiring conductor 5 and a possible upper layer wiring conductor. Then, an electroplating is performed so as to deposit a gold film on the lower layer wiring conductor 5 within the through hole, so that a connection pillar 10 is formed.
As shown in FIG. 1E, the photoresist film 17 is removed, and the power supply film 3 is selectively removed by an etching using the lower layer wiring conductor 5 as a mask.
As shown in FIG. 1F, an interlayer insulator film 18 is deposited on the surface including the lower layer wiring conductor 5 and the connection pillar 10, and the deposited interlayer insulator film 18 is etched back so as to planarize the upper surface and to expose an upper end surface of the connection pillar 10.
In a process similar to that for forming the lower layer wiring conductor 5, as shown in FIG. 1G, a power supply film 19 is formed by depositing a titanium tungsten film 19A and a gold film 19B on the interlayer insulator film 18 and the exposed connection pillar 10, and, a photoresist film 20 is coated on the power supply film 19 and then patterned to form a mask for the possible upper layer wiring conductor.
As shown in FIG. 1H, an electroplating is performed using the photoresist film 20 as a mask, to deposit a gold film on the power supply film 19 so as to form an upper layer wiring conductor 13, and thereafter, the photoresist film 20 is removed.
In the above mentioned process for manufacturing the semiconductor device, since the noble metal wiring conductors are formed by using the plating technique, it is possible to elevate an electromigration resistance and a stress-migration resistance. However, adhesive property between an upper surface of the noble metal wiring conductors and the interlayer insulator film is poor, and therefore, reliability is inevitably low.